IL2208 Electronic System Packaging (HW Engineering) (7.5ECTS) 2B5457 Mixed Signal System Design (7.5ECTS) Course Responsible: Dr. Qiang Chen (VT 2012) last update: 03/13/2012
Course Home Course Description Course Introduction Course Content · List of Content · Labs · Homework · Examination · Projects Hints for HW	Course Description This course provides a unified view of physical system architectures from chip, circuit board, to cabinets. The focus is on design for performance and signal integrity of complex mixed signal systems. Some practical issues of designing high performance ICs, packaging, circuit board, and system-on-package will be addressed.  Start Date: Mar.19, 2012, 10:00-12:00AM. Ka-531, KTH-Forum, Kista. See (Course Schedule) Key Words: Mixed-Signal System Design, High-Speed Digital System Design, RF/Microwave Circuit Board Design, Opto-electronic and Communication System Packaging, Interconnections, System-on-Package. Course Literature: Mainly follow up the Hand-outs Main reference book: High-Speed Digital System Design Stephen H. Hall, Garrett W. Hall, James A. McCall (Wiley Publishers, ISBN: 0-471-36090-2) Second reference book (optional): Fundamentals of Microsystems Packaging Rao R. Tummala, ISBN 0-07-137169-9, McGraw-Hill, 2001 (Books are available at Amazon.com , shipped within 24Hours) Course Format: Lectures, Homework, and Design labs. Exam: Laboratories, and a short written Examination Course Assistants: Zhibo Pang, Zhi Zhang More Information about the course in KTH Study Handbook
Course Home Course Description Course Introduction Course Content · List of Content · Labs · Homework · Examination · Projects Hints for HW	Course Introduction This course provides a unified view of physical architecture of electronic systems from chip to cabinet via focus to interconnectivity and interconnections and their impact to performance and signal integrity and signal couplings. Our aim is to provide a coherent and pragmatic view for understanding the system performance constraints and their dependencies of the underlying technologies in order to define physical architecture of mixed signal systems. During the course we will  Summarize the key interconnection technologies from chip to system with focus on the underlying principles and new technologies which will remain the basic for electronic design and manufacturing through the next decade  Emphasize the interaction of chip and higher packaging level technologies for mixed signal system electrical design and system partitioning to different packaging technologies  Analyze systematically the key electrical phenomena at chip, package and interconnection substrate levels defining the system signal integrity and robustness properties in order to define the future constraints to integration for communication and consumer electronic products.  Emphasize the impact of deep submicron CMOS technologies to system partitioning and packaging technologies. Introduce practical design skills for high-speed circuit board, RF/microwave board and packaging, mixed-signal circuit board, opto-electronic packaging and telecommunication system packaging.  Introduce the early conceptual design for partitioning of the complex system to different packaging and interconnect hierarchies.  The objective of this course is to provide a coherent and pragmatic overview of relevant issues of physical architecture design of complex electronic system presented in such way that practicing electronics designers can communicate with experts in other fields and extract relevant design data for circuit and system design.  About the History of this Course This course is developed from our earlier courses, namely Physical Architecture Design of VLSI systems and Mixed Signal System Design. The courses were originally developed for industrial Engineers from such as Ericsson and Nokia. The today a short version of this course is still given to industry.
Course Home Course Description Course Introduction Course Content · List of Content · Labs · Homework · Examination · Projects Hints for HW	Course Content IL2208/2B1450 Electronic System Packaging (2B5457 Mixed Signal System Design) Lecturer: Dr. Qiang Chen Department of Electronic Systems (ES) School of Information and Communication Technology (ICT) Royal Institute of Technology (KTH) Kista, Sweden Course website: http://www.ict.kth.se/courses/IL2208/
Course Home Course Description Course Introduction Course Content · List of Content · Labs · Homework · Examination · Projects Hints for HW	List of Content L1 Course Introduction. Evolution of Electronic Systems from Chips to Cabinets L2 Interconnect and Packaging Modeling: Inductance, Resistance, and Capacitance L3 Interconnect and Packaging Modeling: Wires, Connectors, Vias, and Solder Bump L4 Digital Signal Integrity in High-Speed Electronic Systems L5 System Noise and Noise Budget Design L6 Power Supply Noise and Grounding in Mixed-Signal System L7  Power Distribution System and Decoupling Allocation L8  EMC/EMI Fundamentals in Electronic Systems L9 Shielding and Electrostatic Discharge (ESD) Protection L10 RF and Microwave System Packaging (download Smith Chart) (How it works) L11 Performance Modelling and Conceptual Design of Electronic Systems L12 Interconnectivity and Rent’s Rule L13 Thermal Design in Electronic System Packaging L14 Optoelectrics and Telecommunication System Packaging L15 Exercise, Homework Correction, Exam Examples. Exam: TBD Re-Exam: TBD 3rd exam: Time will be in August. In this case, you will have an open-book exam, but the exam results will only be “fail” or “E”.
Course Home Course Description Course Introduction Course Content · List of Content · Labs · Homework · Examination · Projects Hints for HW	The Labs Maximum two persons in one lab group. All labs must pass. In Labs, Cadence PSD 14.2 (OrCAD) and Agilent-ADS 2005a, Mentor Graphics Design Tool (Expedition) will be used Lab room: Forum Floor 6, Room 650. Lab.1: Interconnect/Package Modelling and High-Speed Off-Chip Communication Design (Lab 1 Manual and Lab 1 Code ) Lab.2: System-Level Signal Integrity Design and IBIS Model Application (Lab 2 Manual and Lab 2 Code ) Lab.3: Power Distribution and Decoupling for Mixed-Signal Systems (Lab 3 Manual and Lab 3 Code ) Lab.4: RF/Microwave Packaging Design (Lab 4 Manual and Lab 4 Code ) Special Lab Day: March 20, 14:00-16:00. On this date, all lab assistants have reserved their time for you. All previously un-finished labs must be checked out by lab assistants on this time. Place: assistant’s office, Forum Level 8, Lift C, ECS. *********************************************************’ For those who wish to know PCB and Packaging Process, Let’s have a visit at Virtual Packaging Laboratory: Packaging and PCB Processes. Or another lab at GeorgiaTech. For those who are interested in practicing Mentor Graphics Tools, we have several optional labs developed, which you may try it at home or in lab-room on your own time. * * General files for these optional labs (No.1) (No.2) and (Library) * Option 1 Basic Skills of using Mentor Graphics Tools (Lab Exercises) (Presentation of option 1) (Electrotryck) * Option 2 System Signal Integrity Design (Lab Exercises in PDF)( Example files in ZIP) * Option 3 System Schematic Design and Interconnect Synthesis (Manual Lab 3 and 4) (References files) (Package Library) * Option 4 Layout Design and Verification (IBIS file in Option 4) *************************************************************
Course Home Course Description Course Introduction Course Content · List of Content · Labs · Homework · Examination · Projects Hints for HW	Homework Homework will be assigned in each class. Answers of homework must be submitted in the next lecture (in the dark box outside LECS door at Lift C, Level 8, KTH-Forum) for registration. Corrections of homework will be arranged in the next lectures. A final exercise time for homework correction and questions is arranged in Lecture 15. (Submit your Homework to the dark box before the ECS door, Life C, Level 8, KTH-Forum, or to Ms Ana Lopez) Homework 1 (Assigned on Lecture 2, deadline: Apr. 11th, 6:00PM). Homework 2 (Assigned on Lecture 4, deadline: Apr. 18th, 6:00PM) Homework 3 (Assigned on Lecture 5-9, deadline: May 10th, 6:00PM) Homework 4 (Assigned on Lecture 10-12, deadline: May 22nd, 6:00PM) (Tools) (Lecture 15): Exercise, Answer to HW, questions.
Course Home	Examination Previous exam examples: (Exam 2006, Exam 2002) Closed-book written exam. During the exam, you should solve around 5 problems (each problem consists of several small questions, which are related to course content and your home works.) To get your credits, you must complete all labs, and pass the final exam (60%). The final grade will be given by the examination. Special exam for special cases/persons can be arranged upon agreement with the examiner.
Course Home	Projects Design project is not compulsory but is assigned only for those who are interested in doing the practical design projects. There is no relation to the course grading or credits.
Course Home	Hints for Homework Hint for Homework 1, Problem 2(b) The parameters of L, C can be calculated with the field solver. Download 2D FEM Field Solver Here (with L, R, C matrix output and S-parameters) (Education Purpose Only, extract with your password) Note: if you cannot install the file, please download this file. Copy the whole directory and paste in your computer, and run the program. Hint for Homework 4, Last problem: The question is to ask you to design a Pi matching network, in which part of the L, C1and C2 will use the parasitics of this bonding wire (so called parasitic absorption). The smith chart can be downloaded directly.