IL2222, Digital Circuit Design for Nanoscale CMOS, 7.5hp, HT11

Aim

· To enable students to analyze and reason about VLSI Systems at circuit level

· To enable students to make system level decisions rooted in physics and circuit level understanding of VLSI systems

· Introduce design automation tools at circuit level

· Scaling trends and its implications at system level

•

Syllabus

· Design metrics

· Semiconductor primer

· CMOS fabrication

· Layout & design rules

· SPICE simulation

· Inverters and combinational logics

· Sequential circuits

· Interconnect issues

· Scaling trend

· Modeling wire parasitic

Organization

· Lectures: 24 hours (12 occasions of 2 hours)

· Laborations: 16 hours (4 occasions of 4 hours)

Course Requirements

One must pass the Written exam (TEN1 4.5hp) and all four labs before exam (LAB1 3hp) to complete the course. Each lab will be only in the designated Lab session by the lab assistants. Lab do not carry any points but mandatory for completing the course. Bonus Points will be awarded during presentation of Assignment.

Course literature

1. Rabaey, Chandrakasan, and Nikolic. Digital Integrated Circuits, A Design Perspective, 2^nd ed., Prentice Hall, 2003.

2. Chenming Calvin Hu. Modern Semiconductor Devices for Integrated Circuits. Prentice Hall, 2009.

3. Laboration instructions.

4. Lecture notes. Some items are not included in the course books and will be handed out during these lectures.

5. James D. Plummer, Michael Deal, Peter D. Griffin. Silicon VLSI Technology: Fundamentals, Practice, and Modeling. Prentice Hall, 2000. ( As a reference on manufacturing processes)

Examination

Examination will be held on 21 December 2011, 14:00-18:00.

Contacts

Course Examiner	Ahmed Hemani	hemani@kth.se
Course Assistant	Nasim Farahini	farahini@kth.se

Aim