IL2222, Digital Circuit Design for Nanoscale CMOS, 7.5hp, HT11

 

 

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Information

Lectures

Laborations

Course Schedule

FAQs

 

 

Laborations

Each Lab occasion is four hours. Student can use these occasions for Lab examination or queries regarding Lab sessions. One Lab can be performed by maximum of two students in a group. To complete a Lab all students have to complete all Lab tasks, should be able to re-perform any experiment, and should be able pass the oral examination.

 

 

Lab Assistant

·        Nasim Farahini              Email: farahini@kth.se

 

 

Laborations Schedule

Laborations

Week

Date

Time

Room

Lab 1

Week 45

2011-11-10

13.00-17.00

-Ka-D648L

Lab 2

Week 47

2011-11-24

13.00-17.00

Lab 3

Week 48

2011-12-01

13.00-17.00

Lab 4

Week 49

2011-12-08

13.00-17.00

 

 

Instructions

§  Lab 1: Introduction to Cadence Virtuoso

Lab1 Manual Instruction

§  Lab 2: Layout Design and Parasitic Extraction

Lab2 Manual Instruction

§  Lab 3: Gate Design and Post-Layout Simulation

Lab3 Manual Instruction

Lab3 files

 

§ General 

The document Tools How to for IL2222, shows the different possibilities for running the tools needed for this course. It also guides you to install Linux on your own computer without affecting your data and operating system.

   

To launch the tools, you should login to server:

ssh -Y name@malavita.it.kth.se