| [RSJ08] | Tarvo Raudvere, Ingo Sander, and Axel Jantsch. Application and verification of local non-semantic-preserving transformations in system design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(6):1091-1103, June 2008. [ bib | .pdf ] |
| [Jan08] | Axel Jantsch. Models of computation for distributed embedded systems. In Richard Zurawski, editor, Networked Embedded Systems. CRC Press/Taylor & Francis, 2008. [ bib ] |
| [MPSJ08] | Deepak Mathaikutty, Hiren Patel, Sandeep Shukla, and Axel Jantsch. SML-Sys: A functional framework for multiple models of computation for heterogeneous system design. Design Automation for Embedded Systems, 2008. [ bib | http ] |
| [SJ08] | Ingo Sander and Axel Jantsch. Modelling adaptive systems in ForSyDe. Electronic Notes in Theoretical Computer Science (ENTCS), 200(2):39-54, 2008. First Workshop on Verification of Adaptive Systems (VerAS 2007). [ bib | .pdf ] |
| [RSJ07a] | Tarvo Raudvere, Ingo Sander, and Axel Jantsch. Synchronization after design refinements with sensitive delay elements. In International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS), Salzburg, Austria, October 2007. [ bib ] |
| [MPSJ07] | Deepak Mathaikutty, Hiren Patel, Sandeep Shukla, and Axel Jantsch. EWD: A metamodeling driven customizable multi-moc system modeling framework. ACM Transactions on Design Automation of Embedded Systems, 12(3), August 2007. [ bib | .pdf ] |
| [LSSJ07] | Zhonghai Lu, Jonas Sicking, Ingo Sander, and Axel Jantsch. Using synchronizers for refining synchronous communication onto hardware/software architectures. In Proceedings of the 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP'07), Porto Alegre, Brazil, May 2007. [ bib ] |
| [Aco07] | Alfonso Acosta. Hardware synthesis in ForSyDe. Master's thesis, School for Information and Communication Technology, Royal Institute of Technology (KTH), Stockholm, Sweden, 2007. KTH/ICT/ECS-2007-81. [ bib | .pdf ] |
| [RSJ07b] | Tarvo Raudvere, Ingo Sander, and Axel Jantsch. A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops. In Proceedings of the 17th Great Lakes Symposium on VLSI (GLSVLSI '07), pages 353-358, 2007. [ bib ] |
| [LSJ06b] | Zhonghai Lu, Ingo Sander, and Axel Jantsch. Towards performance-oriented pattern-based refinement of synchronous models onto NoC communication. In Proceedings of the 9th Euromicro Conference on Digital System Design (DSD'06), Dubrovnik, Croatia, August 2006. [ bib | .pdf ] |
| [LSJ06a] | Zhonghai Lu, Ingo Sander, and Axel Jantsch. Refining synchronous communication onto network-on-chip best-effort services. In Advances in Design and Specification Languages for SoCs - Selected Contributions from FDL 2005. Springer Verlag, April 2006. [ bib | .pdf ] |
| [MPSJ06] | Deepak Abraham Mathaikutty, Hiren Patel, Sandeep K. Shukla, and Axel Jantsch. UMoC++: A C++-based multi-MoC modeling environment. In Alain Vachoux, editor, Advances in Design and Specification Languages for SoCs - Selected Contributions from FDL'05, chapter 7. Springer Verlag, 2006. [ bib | .pdf ] |
| [MPSJ05] | Deepak Abraham Mathaikutty, Hiren Patel, Sandeep K. Shukla, and Axel Jantsch. UMoC++: Modeling environment for heterogeneous systems based on generic MoCs. In Proceedings of the Forum on Design Languages, September 2005. [ bib ] |
| [LSJ05] | Zhonghai Lu, Ingo Sander, and Axel Jantsch. Refinement of a perfectly synchronous communication model onto Nostrum NoC best-effort communication. In Proceedings of the Forum on Specification and Design Languages (FDL'05), September 2005. [ bib | .pdf ] |
| [JS05a] | Axel Jantsch and Ingo Sander. Models of computation and languages for embedded system design. IEE Proceedings on Computers and Digital Techniques, 152(2):114-129, March 2005. Special issue on Embedded Microelectronic Systems; Invited paper. [ bib | .pdf ] |
| [JS05b] | Axel Jantsch and Ingo Sander. Models of computation in the design process. In Bashir M Al-Hashimi, editor, SoC: Next Generation Electronics. IEE, 2005. Invited contribution. [ bib | .pdf ] |
| [Jan05] | Axel Jantsch. Models of embedded computation. In Richard Zurawski, editor, Embedded Systems Handbook. CRC Press, 2005. Invited contribution. [ bib | .pdf ] |
| [Sic05] | Jonas Sicking. Implementation of asynchronous communication for ForSyDe in hardware and software. Master's thesis, Institute of Microelectronics and Information Technology, Royal Institute of Technology (KTH), Stockholm, Sweden, 2005. IMIT/LECS-2005-73. [ bib | .pdf ] |
| [RSSJ04] | Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, and Axel Jantsch. Polynomial abstraction for verification of sequentially implemented combinational circuits. In Design, Automation and Test in Europe Conference (DATE 2004), Paris, France, February 2004. [ bib | .pdf ] |
| [SJ04] | Ingo Sander and Axel Jantsch. System modeling and transformational design refinement in ForSyDe. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 23(1):17-32, January 2004. [ bib ] |
| [RSSJ03] | Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, and Axel Jantsch. Verification of design decisions in ForSyDe. In Proceedings of the 1st International Conference on Hardware - Software Codesign and System Synthesis (CODES+ISSS), Newport Beach, California, USA, October 2003. [ bib | .pdf ] |
| [SJL03a] | Ingo Sander, Axel Jantsch, and Zhonghai Lu. Development and application of design transformations in ForSyDe. IEE Proceedings - Computers & Digital Techniques, 5:313-320, September 2003. Special Issue - Best of DATE '03. [ bib | .pdf ] |
| [Jan03] | Axel Jantsch. Modeling Embedded Systems and SoCs - Concurrency and Time in Models of Computation. Systems on Silicon. Morgan Kaufmann Publishers, June 2003. [ bib | http ] |
| [San03] | Ingo Sander. System Modeling and Design Refinement in ForSyDe. PhD thesis, Royal Institute of Technology, Stockholm, Sweden, April 2003. [ bib | .pdf ] |
| [SJL03b] | Ingo Sander, Axel Jantsch, and Zhonghai Lu. Development and application of design transformations in ForSyDe. In Design, Automation and Test in Europe Conference (DATE 2003), pages 364-369, Munich, Germany, March 2003. [ bib | .pdf ] |
| [LSJ02] | Zhonghai Lu, Ingo Sander, and Axel Jantsch. A case study of hardware and software synthesis in ForSyDe. In Proceedings of the 15th International Symposium on System Synthesis, pages 86-91, Kyoto, Japan, October 2002. [ bib ] |
| [SJ02] | Ingo Sander and Axel Jantsch. Transformation based communication and clock domain refinement for system design. In 39th Design Automation Conference (DAC 2002), pages 281-286, New Orleans, USA, June 2002. [ bib | .pdf ] |
| [JSW01] | Axel Jantsch, Ingo Sander, and Wenbiao Wu. The usage of stochastic processes in embedded system specifications. In Proceedings of the Ninth International Symposium on Hardware/Software Codesign, April 2001. [ bib | www: ] |
| [JS00] | Axel Jantsch and Ingo Sander. On the roles of functions and objects in system specification. In Proceedings of the International Workshop on Hardware/Software Codesign, 2000. [ bib | www: ] |
| [SJ99c] | Ingo Sander and Axel Jantsch. System synthesis utilizing a layered functional model. In Proceedings Seventh International Workshop on Hardware/Software Codesign, pages 136-140, Rome, Italy, May 1999. ACM Press. [ bib | .pdf ] |
| [SJ99b] | Ingo Sander and Axel Jantsch. System synthesis based on a formal computational model and skeletons. In Proceedings IEEE Workshop on VLSI'99, pages 32-39, Orlando, Florida, USA, April 1999. IEEE Computer Society. [ bib | .pdf ] |
| [SJ99a] | Ingo Sander and Axel Jantsch. Formal system design based on the synchrony hypothesis. In Proceedings of the 12th international conference on VLSI Design, pages 318-323, Goa, India, January 1999. [ bib | .pdf ] |